EEE3050: Theory on Computer Architectures (Spring 2017)

[Schedule]

The following schedule is tentative and subject to change without notice.

Day Topic Reading
Week 1 Course Outline

Abstraction

P&H Chap. 1
Week 2 MIPS Instruction Set Architecture (ISA)-1 P&H Chap. 2.1~2.4
Week 3 MIPS Instruction Set Architecture (ISA)-2 P&H Chap. 2.5~2.11
Week 4 MIPS Instruction Set Architecture (ISA) / ARM & IA-32 ISA (cont'd)
Week 5 Arithmetic for Computers
Week 6 Processor: Datapath & Control
Week 7 Pipelining (1)
Week 8 Mid-term Exam
Week 9 Pipelining (2)
Week 10 Advanced Instruction-Level Parallelism (ILP)
Week 11 Memory Hierarchy: Caches and Virtual Memory
Week 12 Memory Hierarchy: Caches and Virtual Memory (cont'd)
Week 13 Memory Hierarchy: Caches and Virtual Memory (cont'd)
Week 14 Multicores, Multoprocessors and Clusters
Week 15 Multicores, Multoprocessors and Clusters (cont'd)
Week 16 Final Exam


Credit: Some of the slides for this lecture are based on materials provided by the textbook publisher and by Prof. Jae W. Lee at SNU.