EEE3050: Theory on Computer Architectures (Spring 2017)

[Schedule]

The following schedule is tentative and subject to change without notice.

Day Topic Reading
Week 1 Course Outline

Abstraction

P&H Chap. 1
Week 2 MIPS Instruction Set Architecture (ISA)-1 P&H Chap. 2.1~2.4
Week 3 MIPS Instruction Set Architecture (ISA)-2 P&H Chap. 2.5~2.11
Week 4 Arithmetic for Computers (Integer) P&H Chap. 3.1~3.4
Week 5 Arithmetic for Computers (Floating-point) P&H Chap. 3.5
Week 6 Processor: Datapath & Control P&H Chap. 4.1~4.4
Week 7 Pipelining (1) P&H Chap. 4.5~4.6
Week 8 Mid-term Exam
Week 9 Pipelining (2) P&H Chap. 4.7~4.8
Week 10 Exceptions P&H Chap. 4.9
Week 11 Advanced Instruction-Level Parallelism (ILP) P&H Chap. 4.10
Week 12 Memory Hierarchy: Caches (1), (2) P&H Chap. 5.1~5.4
Week 13 Memory Hierarchy: Virtual Memory P&H Chap. 5.7
Week 14 Memory Hierarchy: A Common Framework P&H Chap. 5.8
Week 15 Multicores, Multiprocessors P&H Chap. 6.1~6.5
Week 16 Final Exam


Credit: Some of the slides for this lecture are based on materials provided by the textbook publisher and by Prof. Jae W. Lee at SNU.