SSE3044S18.Projects History

Show minor edits - Show changes to output

June 25, 2018, at 08:49 AM by 115.145.211.193 -
Added lines 105-106:

* [[Attach:result3-1.pdf|Project #3-1 result]]
June 25, 2018, at 08:47 AM by 115.145.211.198 -
Added lines 111-113:

* [[Attach:result3-2.pdf|Project #3-2 result]]
June 25, 2018, at 05:59 AM by 115.145.211.198 -
Deleted line 94:
* [[Attach:aa.pdf|aa]]
June 25, 2018, at 05:58 AM by 115.145.211.198 -
Added line 95:
* [[Attach:aa.pdf|aa]]
June 13, 2018, at 03:23 PM by 115.145.211.193 -
Added lines 72-73:
* [[Attach:result1-2.pdf|Project #1-2 result]]
Added line 99:
* [[Attach:result2-2.pdf|Project #2-2 result]]
June 11, 2018, at 04:14 AM by 115.145.211.198 -
Added lines 91-92:

* [[Attach:result2-1.pdf|Project #2-1 result]]
June 09, 2018, at 10:31 AM by 115.145.211.193 -
Changed lines 101-102 from:
!!! [[Attach:Mutex&CV_3-2.pdf|Project #3-2]] (Deadline: 5/30~6/12(Tue.), Last update: 5/30(Wed.), 05:00PM)
to:
!!! [[Attach:Mutex&CV_3-2.pdf|Project #3-2]] (Deadline: 5/30~6/12(Tue.), Last update: 6/9(Wed.), 07:20PM)
Added line 105:
* You should edit your Makefile for added synch.c and synch.h
June 09, 2018, at 10:25 AM by 115.145.211.193 -
Changed line 104 from:
* [[Attach:testcase3_2.tar.gz|Project #3-2 testcase]]
to:
* [[Attach:testcase3-2.tar.gz|Project #3-2 testcase]]
May 30, 2018, at 07:59 AM by 115.145.211.198 -
Changed lines 99-104 from:
* [[Attach:testcase3_1.tar.gz|Project #3-1 testcase]]
to:
* [[Attach:testcase3_1.tar.gz|Project #3-1 testcase]]

!!! [[Attach:Mutex&CV_3-2.pdf|Project #3-2]] (Deadline: 5/30~6/12(Tue.), Last update: 5/30(Wed.), 05:00PM)

* Implement Mutex & Condition Variable on xv6
* [[Attach:testcase3_2.tar.gz|Project #3-2
testcase]]
May 27, 2018, at 02:05 PM by 115.145.211.193 -
Changed line 99 from:
* [[Attach:testcase3-1.tar.gz|Project #3-1 testcase]]
to:
* [[Attach:testcase3_1.tar.gz|Project #3-1 testcase]]
May 27, 2018, at 02:05 PM by 115.145.211.193 -
Changed lines 96-97 from:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/29(Tue.), Last update: 5/23(Wed.), 18:00PM)
to:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/16~5/29(Tue.), Last update: 5/27(Wed.), 23:00PM)
Added line 99:
* [[Attach:testcase3-1.tar.gz|Project #3-1 testcase]]
May 23, 2018, at 09:05 AM by 115.145.208.99 -
Changed line 96 from:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/15(Tue.), Last update: 5/2(Wed.), 18:00PM)
to:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/29(Tue.), Last update: 5/23(Wed.), 18:00PM)
May 16, 2018, at 08:39 AM by 115.145.211.193 -
May 16, 2018, at 06:57 AM by 115.145.211.193 -
Added lines 95-98:

!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/15(Tue.), Last update: 5/2(Wed.), 18:00PM)

* Implement thread-support on xv6
May 10, 2018, at 03:05 AM by 115.145.211.198 -
May 02, 2018, at 08:41 AM by 115.145.211.193 -
Changed lines 92-93 from:
to:
!!! [[Attach:Virtualmemory_2.pdf|Project #2-2]] (Deadline: 5/15(Tue.), Last update: 5/2(Wed.), 18:00PM)

* Implement copy-on-write on xv6
April 26, 2018, at 06:35 AM by 115.145.211.198 -
Changed line 90 from:
(Pagefault): invalid access
to:
(Pagefault): invalid access!
April 26, 2018, at 06:35 AM by 115.145.211.198 -
Added lines 78-91:
* %red%ATTENTION!!!%% If page fault is occurred, you must print out "(Pagefault): invalid access!" or "(Pagefault): allocate new page!"
* Then, correct results for each test case is
case 1. (Pagefault): invalid access!
case 2. (Pagefault): allocate new page!
PASSED!
case 3. (Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): allocate new page!
PASSED!
case 4. (Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): invalid access
April 15, 2018, at 12:02 PM by 115.145.211.193 -
Added line 23:
* Location: #400509, Semiconductor Building http://csl.skku.edu/images/new.gif
Changed lines 55-56 from:
- There is no scenario such as target nice value of setnice is same as original nice value http://csl.skku.edu/images/new.gif
- [[Attach:sample_test1_2.tar.gz|Sample testcase]] http://csl.skku.edu/images/new.gif
to:
- There is no scenario such as target nice value of setnice is same as original nice value
- [[Attach:sample_test1_2.tar.gz|Sample testcase]]
April 11, 2018, at 07:31 AM by 115.145.211.198 -
Added lines 39-40:

* [[Attach:result1-1.pdf|Project #1-1 result]]
April 11, 2018, at 07:19 AM by 115.145.211.198 -
Added lines 68-76:

!!! [[Attach:project2-1.pdf|Project #2-1]] (Deadline: 4/11~5/1(Tue.), Last update: 4/11(Wed.), 16:00PM)

* Implement stack growth on xv6
* Oral test progress after project #2-1 (prepare for 10 minutes of presentation)
* Schedule of oral test will be announced
* [[Attach:testcase2-1.tar.gz|Project #2-1 testcase]]
April 11, 2018, at 06:38 AM by 115.145.211.193 -
Changed line 22 from:
* Link: https://docs.google.com/spreadsheets/d/1m0QVW5EOgphfblTJUC8hRkEPBG9bPRBy1XSmDkY356I/edit?usp=sharing
to:
* https://docs.google.com/spreadsheets/d/1m0QVW5EOgphfblTJUC8hRkEPBG9bPRBy1XSmDkY356I/edit?usp=sharing
April 11, 2018, at 06:38 AM by 115.145.211.193 -
Changed lines 20-24 from:
to:
!!! [Lab. Oral test]

* Link: https://docs.google.com/spreadsheets/d/1m0QVW5EOgphfblTJUC8hRkEPBG9bPRBy1XSmDkY356I/edit?usp=sharing
* You should prepare presentation about your code
* Please, don't be late
April 05, 2018, at 11:39 AM by 115.145.211.193 -
April 05, 2018, at 10:50 AM by 115.145.211.193 -
Changed lines 52-63 from:
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
to:
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
April 05, 2018, at 10:49 AM by 115.145.211.193 -
Changed lines 50-62 from:
- Correct output for test_2_1.c
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
to:
* Correct output for test_2_1.c
[Case 2. Setnice, Yield] Start
-...state 1...
-
...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
April 05, 2018, at 10:47 AM by 115.145.211.193 -
Changed lines 49-62 from:
- [[Attach:sample_test1_2.tar.gz|Sample testcase]] http://csl.skku.edu/images/new.gif
to:
- [[Attach:sample_test1_2.tar.gz|Sample testcase]] http://csl.skku.edu/images/new.gif
- Correct output for test_2_1.c
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
April 05, 2018, at 10:45 AM by 115.145.211.193 -
Changed lines 48-49 from:
- There is no scenario such as target nice value of setnice is same as original nice value http://csl.skku.edu/images/new.gif
to:
- There is no scenario such as target nice value of setnice is same as original nice value http://csl.skku.edu/images/new.gif
- [[Attach:sample_test1_2.tar.gz|Sample testcase]]
http://csl.skku.edu/images/new.gif
April 05, 2018, at 08:51 AM by 115.145.211.193 -
Changed line 48 from:
- There is no scenario such as target nice value of setnice is same as original nice value
to:
- There is no scenario such as target nice value of setnice is same as original nice value http://csl.skku.edu/images/new.gif
April 05, 2018, at 08:51 AM by 115.145.211.193 -
Changed lines 36-37 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.), Last update: 3/30(Thu.), 18:40PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: 3/27~4/10(Tue.), Last update: 4/5(Thu.), 18:00PM)
Changed lines 47-48 from:
- Increase each process's yield count at only yield system call
to:
- Increase each process's yield count at only yield system call
- There is no scenario such as target nice value of setnice is same as original nice value
March 30, 2018, at 09:41 AM by 115.145.211.193 -
Changed lines 36-37 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.), Last update: 3/28(Thu.), 13:15PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.), Last update: 3/30(Thu.), 18:40PM)
Changed lines 44-47 from:
* Schedule of oral test will be announced
to:
* Schedule of oral test will be announced

* Update list
- Increase each process's yield count at only yield system call
March 29, 2018, at 05:02 AM by 115.145.211.193 -
Changed lines 39-41 from:
* Due: 4/3(Thu.) 23:59:59PM
to:
* Due: 4/10(Thu.) 23:59:59PM -> There will be Q&A session on 4/3(Thu.) 18:00 PM
* If you have any question, please email or visit 400509
March 29, 2018, at 04:14 AM by 115.145.211.193 -
Changed line 36 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.) 23:59:59 PM, Last update: 3/28(Thu.), 13:15PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.), Last update: 3/28(Thu.), 13:15PM)
March 29, 2018, at 04:14 AM by 115.145.211.193 -
Changed line 36 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 13:15PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.) 23:59:59 PM, Last update: 3/28(Thu.), 13:15PM)
March 29, 2018, at 04:13 AM by 115.145.211.193 -
Changed lines 36-37 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 17:30PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 13:15PM)
Changed line 42 from:
* Oral test schedule will be announced
to:
* Schedule of oral test will be announced
March 29, 2018, at 04:13 AM by 115.145.211.193 -
Changed lines 39-42 from:
* Due: 4/3(Thu.) 23:59:59PM
to:
* Due: 4/3(Thu.) 23:59:59PM
* There exist oral test after project1-2. This oral test should cover entire project1
* You should prepare 5~10 minute presentation about your implementation
* Oral test schedule will be announced
March 28, 2018, at 08:30 AM by 115.145.211.193 -
Changed lines 34-39 from:
* You have to set initial nice value of process to 20
to:
* You have to set initial nice value of process to 20

!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 17:30PM)

* Implement priority based scheduler on xv6
* Due: 4/3(Thu.) 23:59:59PM
March 27, 2018, at 09:56 AM by 115.145.208.164 -
Changed line 34 from:
* You have to set initial nice value of process to 20 http://csl.skku.edu/images/new.gif
to:
* You have to set initial nice value of process to 20
March 22, 2018, at 09:37 AM by 115.145.211.193 -
Changed line 28 from:
!!! [[Attach:project1-1.pdf|Project #1-1]] (Last update: 3/21(Wed.), 15:30PM)
to:
!!! [[Attach:project1-1.pdf|Project #1-1]] (Last update: 3/22(Thu.), 18:30PM)
March 22, 2018, at 09:37 AM by 115.145.211.193 -
Changed lines 26-27 from:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif
to:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects
Changed lines 33-34 from:
* Submit tarball file to TA by e-mail with title "[SSE3044]StudentID-1-1"
to:
* Submit tarball file to TA by e-mail with title "[SSE3044]StudentID-1-1"
* You have to set initial nice value of process to 20 http://csl.skku.edu/images/new.gif
March 21, 2018, at 07:03 AM by 115.145.211.193 -
Changed line 16 from:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg.
to:
* Wednesday, 6:00 PM, #400202 in Semiconductor Bldg.
Changed line 33 from:
* Submit tarbell file to TA by e-mail with title "[SSE3044]StudentID-1-1"
to:
* Submit tarball file to TA by e-mail with title "[SSE3044]StudentID-1-1"
March 21, 2018, at 06:29 AM by 115.145.211.198 -
Changed lines 31-32 from:
* Show your student ID and name on boot message
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif
to:
* Implement setnice & getnice system call in xv6
* Implement minitop shell command in xv6
* Submit tarbell file to TA by e-mail with title "[SSE3044]StudentID-1-1"
March 21, 2018, at 06:25 AM by 115.145.211.198 -
Changed line 30 from:
* [[Attach:xv6-SSE3044.tar.gz|xv6-SSE3044]]
to:
* [[Attach:xv6-SSE3044.tar.gz|xv6 template code]]
March 21, 2018, at 06:25 AM by 115.145.211.198 -
Changed line 30 from:
* Try to boot xv6 operating system
to:
* [[Attach:xv6-SSE3044.tar.gz|xv6-SSE3044]]
March 21, 2018, at 06:23 AM by 115.145.211.198 -
Added lines 23-28:

* Try to boot xv6 operating system
* Show your student ID and name on boot message
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif

!!! [[Attach:project1-1.pdf|Project #1-1]] (Last update: 3/21(Wed.), 15:30PM)
March 15, 2018, at 05:32 AM by 115.145.211.193 -
March 15, 2018, at 05:31 AM by 115.145.211.193 -
Changed line 16 from:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg. http://csl.skku.edu/images/new.gif
to:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg.
Changed lines 22-23 from:
!!! [[Attach:project0.pdf|Project #0]] (Last update: 3/14(Wed.), 18:30PM)
to:
!!! [[Attach:project0.pdf|Project #0]] (Last update: 3/15(Thu.), 14:30PM)
Changed line 26 from:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects
to:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif
March 15, 2018, at 05:31 AM by 115.145.211.193 -
Added line 26:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects
March 14, 2018, at 09:25 AM by 115.145.211.193 -
Changed line 22 from:
!!! [[Attach:project0|Project #0]] (Last update: 3/14(Wed.), 18:30PM)
to:
!!! [[Attach:project0.pdf|Project #0]] (Last update: 3/14(Wed.), 18:30PM)
March 14, 2018, at 09:24 AM by 115.145.211.193 -
Changed lines 22-25 from:
!!! [[Attach:project0|Project #0]]
to:
!!! [[Attach:project0|Project #0]] (Last update: 3/14(Wed.), 18:30PM)

* Try to boot xv6 operating system
* Show your student ID and name on boot message
March 14, 2018, at 03:25 AM by 115.145.211.193 -
Added line 17:
* Please bring your laptop
March 13, 2018, at 04:35 AM by 115.145.211.193 -
Added lines 18-19:
March 13, 2018, at 04:27 AM by 115.145.211.193 -
Changed lines 16-19 from:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg. http://csl.skku.edu/images/new.gif
to:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg. http://csl.skku.edu/images/new.gif
* First lab will start on 3/14 (Wed.)

!!! [[Attach:project0|Project #0]]
March 13, 2018, at 01:10 AM by 115.145.212.143 -
Changed line 16 from:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg.
to:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg. http://csl.skku.edu/images/new.gif
March 06, 2018, at 05:30 AM by 115.145.211.198 -
Changed lines 15-16 from:
* TBD.
to:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg.
February 26, 2018, at 11:46 AM by 115.145.212.143 -
Added lines 1-15:
!! SSE3044: Operating Systems (Spring 2018)

!!! [Projects]

* You will have several projects based on the xv6 instructional operating system. To successfully complete these projects, you must have excellent C programming skill and be familiar with the Linux platform.

* Required skills
** Fluent C programming (must!)
** Basic knowledge on Intel x86 architecture
** Intel x86 assembly programming
** Basic knowledge on Unix/Linux systems
** Ability to read a large, complex program

!!! [Lab. Class]
* TBD.