SSE3044S18.Projects History
Hide minor edits - Show changes to output
Added lines 72-73:
* [[Attach:result1-2.pdf|Project #1-2 result]]
Added line 99:
* [[Attach:result2-2.pdf|Project #2-2 result]]
Changed lines 101-102 from:
!!! [[Attach:Mutex&CV_3-2.pdf|Project #3-2]] (Deadline: 5/30~6/12(Tue.), Last update: 5/30(Wed.), 05:00PM)
to:
!!! [[Attach:Mutex&CV_3-2.pdf|Project #3-2]] (Deadline: 5/30~6/12(Tue.), Last update: 6/9(Wed.), 07:20PM)
Added line 105:
* You should edit your Makefile for added synch.c and synch.h
Changed line 104 from:
* [[Attach:testcase3_2.tar.gz|Project #3-2 testcase]]
to:
* [[Attach:testcase3-2.tar.gz|Project #3-2 testcase]]
Changed lines 99-104 from:
* [[Attach:testcase3_1.tar.gz|Project #3-1 testcase]]
to:
* [[Attach:testcase3_1.tar.gz|Project #3-1 testcase]]
!!! [[Attach:Mutex&CV_3-2.pdf|Project #3-2]] (Deadline: 5/30~6/12(Tue.), Last update: 5/30(Wed.), 05:00PM)
* Implement Mutex & Condition Variable on xv6
* [[Attach:testcase3_2.tar.gz|Project #3-2 testcase]]
!!! [[Attach:Mutex&CV_3-2.pdf|Project #3-2]] (Deadline: 5/30~6/12(Tue.), Last update: 5/30(Wed.), 05:00PM)
* Implement Mutex & Condition Variable on xv6
* [[Attach:testcase3_2.tar.gz|Project #3-2 testcase]]
Changed line 99 from:
* [[Attach:testcase3-1.tar.gz|Project #3-1 testcase]]
to:
* [[Attach:testcase3_1.tar.gz|Project #3-1 testcase]]
Changed lines 96-97 from:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/29(Tue.), Last update: 5/23(Wed.), 18:00PM)
to:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/16~5/29(Tue.), Last update: 5/27(Wed.), 23:00PM)
Added line 99:
* [[Attach:testcase3-1.tar.gz|Project #3-1 testcase]]
Changed line 96 from:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/15(Tue.), Last update: 5/2(Wed.), 18:00PM)
to:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/29(Tue.), Last update: 5/23(Wed.), 18:00PM)
Added lines 95-98:
!!! [[Attach:Synchronization_3.pdf|Project #3-1]] (Deadline: 5/15(Tue.), Last update: 5/2(Wed.), 18:00PM)
* Implement thread-support on xv6
Changed lines 92-93 from:
to:
!!! [[Attach:Virtualmemory_2.pdf|Project #2-2]] (Deadline: 5/15(Tue.), Last update: 5/2(Wed.), 18:00PM)
* Implement copy-on-write on xv6
* Implement copy-on-write on xv6
Changed line 90 from:
(Pagefault): invalid access
to:
(Pagefault): invalid access!
Added lines 78-91:
* %red%ATTENTION!!!%% If page fault is occurred, you must print out "(Pagefault): invalid access!" or "(Pagefault): allocate new page!"
* Then, correct results for each test case is
case 1. (Pagefault): invalid access!
case 2. (Pagefault): allocate new page!
PASSED!
case 3. (Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): allocate new page!
PASSED!
case 4. (Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): invalid access
* Then, correct results for each test case is
case 1. (Pagefault): invalid access!
case 2. (Pagefault): allocate new page!
PASSED!
case 3. (Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): allocate new page!
PASSED!
case 4. (Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): allocate new page!
(Pagefault): invalid access
Added line 23:
* Location: #400509, Semiconductor Building http://csl.skku.edu/images/new.gif
Changed lines 55-56 from:
- There is no scenario such as target nice value of setnice is same as original nice value http://csl.skku.edu/images/new.gif
- [[Attach:sample_test1_2.tar.gz|Sample testcase]] http://csl.skku.edu/images/new.gif
to:
- There is no scenario such as target nice value of setnice is same as original nice value
- [[Attach:sample_test1_2.tar.gz|Sample testcase]]
- [[Attach:sample_test1_2.tar.gz|Sample testcase]]
Added lines 68-76:
!!! [[Attach:project2-1.pdf|Project #2-1]] (Deadline: 4/11~5/1(Tue.), Last update: 4/11(Wed.), 16:00PM)
* Implement stack growth on xv6
* Oral test progress after project #2-1 (prepare for 10 minutes of presentation)
* Schedule of oral test will be announced
* [[Attach:testcase2-1.tar.gz|Project #2-1 testcase]]
Changed line 22 from:
* Link: https://docs.google.com/spreadsheets/d/1m0QVW5EOgphfblTJUC8hRkEPBG9bPRBy1XSmDkY356I/edit?usp=sharing
to:
* https://docs.google.com/spreadsheets/d/1m0QVW5EOgphfblTJUC8hRkEPBG9bPRBy1XSmDkY356I/edit?usp=sharing
Changed lines 20-24 from:
to:
!!! [Lab. Oral test]
* Link: https://docs.google.com/spreadsheets/d/1m0QVW5EOgphfblTJUC8hRkEPBG9bPRBy1XSmDkY356I/edit?usp=sharing
* You should prepare presentation about your code
* Please, don't be late
* Link: https://docs.google.com/spreadsheets/d/1m0QVW5EOgphfblTJUC8hRkEPBG9bPRBy1XSmDkY356I/edit?usp=sharing
* You should prepare presentation about your code
* Please, don't be late
Changed lines 52-63 from:
-...state 2...
-...state 11...
to:
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
Changed lines 50-62 from:
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
to:
* Correct output for test_2_1.c
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
Changed lines 49-62 from:
- [[Attach:sample_test1_2.tar.gz|Sample testcase]] http://csl.skku.edu/images/new.gif
to:
- [[Attach:sample_test1_2.tar.gz|Sample testcase]] http://csl.skku.edu/images/new.gif
- Correct output for test_2_1.c
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
- Correct output for test_2_1.c
[Case 2. Setnice, Yield] Start
-...state 1...
-...state 2...
-...state 3...
-...state 4...
-...state 5...
-...state 6...
-...state 7...
-...state 8...
-...state 9...
-...state 10...
-...state 11...
Changed lines 48-49 from:
- There is no scenario such as target nice value of setnice is same as original nice value http://csl.skku.edu/images/new.gif
to:
- There is no scenario such as target nice value of setnice is same as original nice value http://csl.skku.edu/images/new.gif
- [[Attach:sample_test1_2.tar.gz|Sample testcase]] http://csl.skku.edu/images/new.gif
- [[Attach:sample_test1_2.tar.gz|Sample testcase]] http://csl.skku.edu/images/new.gif
Changed line 48 from:
- There is no scenario such as target nice value of setnice is same as original nice value
to:
- There is no scenario such as target nice value of setnice is same as original nice value http://csl.skku.edu/images/new.gif
Changed lines 36-37 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.), Last update: 3/30(Thu.), 18:40PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: 3/27~4/10(Tue.), Last update: 4/5(Thu.), 18:00PM)
Changed lines 47-48 from:
- Increase each process's yield count at only yield system call
to:
- Increase each process's yield count at only yield system call
- There is no scenario such as target nice value of setnice is same as original nice value
- There is no scenario such as target nice value of setnice is same as original nice value
Changed lines 36-37 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.), Last update: 3/28(Thu.), 13:15PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.), Last update: 3/30(Thu.), 18:40PM)
Changed lines 44-47 from:
* Schedule of oral test will be announced
to:
* Schedule of oral test will be announced
* Update list
- Increase each process's yield count at only yield system call
* Update list
- Increase each process's yield count at only yield system call
Changed lines 39-41 from:
* Due: 4/3(Thu.) 23:59:59PM
to:
* Due: 4/10(Thu.) 23:59:59PM -> There will be Q&A session on 4/3(Thu.) 18:00 PM
* If you have any question, please email or visit 400509
* If you have any question, please email or visit 400509
Changed line 36 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.) 23:59:59 PM, Last update: 3/28(Thu.), 13:15PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.), Last update: 3/28(Thu.), 13:15PM)
Changed line 36 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 13:15PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Deadline: ~4/3(Tue.) 23:59:59 PM, Last update: 3/28(Thu.), 13:15PM)
Changed lines 36-37 from:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 17:30PM)
to:
!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 13:15PM)
Changed line 42 from:
* Oral test schedule will be announced
to:
* Schedule of oral test will be announced
Changed lines 39-42 from:
* Due: 4/3(Thu.) 23:59:59PM
to:
* Due: 4/3(Thu.) 23:59:59PM
* There exist oral test after project1-2. This oral test should cover entire project1
* You should prepare 5~10 minute presentation about your implementation
* Oral test schedule will be announced
* There exist oral test after project1-2. This oral test should cover entire project1
* You should prepare 5~10 minute presentation about your implementation
* Oral test schedule will be announced
Changed lines 34-39 from:
* You have to set initial nice value of process to 20
to:
* You have to set initial nice value of process to 20
!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 17:30PM)
* Implement priority based scheduler on xv6
* Due: 4/3(Thu.) 23:59:59PM
!!! [[Attach:project1-2.pdf|Project #1-2]] (Last update: 3/28(Thu.), 17:30PM)
* Implement priority based scheduler on xv6
* Due: 4/3(Thu.) 23:59:59PM
Changed line 34 from:
* You have to set initial nice value of process to 20 http://csl.skku.edu/images/new.gif
to:
* You have to set initial nice value of process to 20
Changed line 28 from:
!!! [[Attach:project1-1.pdf|Project #1-1]] (Last update: 3/21(Wed.), 15:30PM)
to:
!!! [[Attach:project1-1.pdf|Project #1-1]] (Last update: 3/22(Thu.), 18:30PM)
Changed lines 26-27 from:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif
to:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects
Changed lines 33-34 from:
* Submit tarball file to TA by e-mail with title "[SSE3044]StudentID-1-1"
to:
* Submit tarball file to TA by e-mail with title "[SSE3044]StudentID-1-1"
* You have to set initial nice value of process to 20 http://csl.skku.edu/images/new.gif
* You have to set initial nice value of process to 20 http://csl.skku.edu/images/new.gif
Changed line 16 from:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg.
to:
* Wednesday, 6:00 PM, #400202 in Semiconductor Bldg.
Changed line 33 from:
* Submit tarbell file to TA by e-mail with title "[SSE3044]StudentID-1-1"
to:
* Submit tarball file to TA by e-mail with title "[SSE3044]StudentID-1-1"
Changed lines 31-32 from:
* Show your student ID and name on boot message
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif
to:
* Implement setnice & getnice system call in xv6
* Implement minitop shell command in xv6
* Submit tarbell file to TA by e-mail with title "[SSE3044]StudentID-1-1"
* Implement minitop shell command in xv6
* Submit tarbell file to TA by e-mail with title "[SSE3044]StudentID-1-1"
Changed line 30 from:
* [[Attach:xv6-SSE3044.tar.gz|xv6-SSE3044]]
to:
* [[Attach:xv6-SSE3044.tar.gz|xv6 template code]]
Changed line 30 from:
* Try to boot xv6 operating system
to:
* [[Attach:xv6-SSE3044.tar.gz|xv6-SSE3044]]
Added lines 23-28:
* Try to boot xv6 operating system
* Show your student ID and name on boot message
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif
!!! [[Attach:project1-1.pdf|Project #1-1]] (Last update: 3/21(Wed.), 15:30PM)
Changed line 16 from:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg. http://csl.skku.edu/images/new.gif
to:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg.
Changed lines 22-23 from:
!!! [[Attach:project0.pdf|Project #0]] (Last update: 3/14(Wed.), 18:30PM)
to:
!!! [[Attach:project0.pdf|Project #0]] (Last update: 3/15(Thu.), 14:30PM)
Changed line 26 from:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects
to:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects http://csl.skku.edu/images/new.gif
Added line 26:
* Reading chap. 0, and chap. 1 of xv6-commentary will help your next projects
Changed line 22 from:
!!! [[Attach:project0|Project #0]] (Last update: 3/14(Wed.), 18:30PM)
to:
!!! [[Attach:project0.pdf|Project #0]] (Last update: 3/14(Wed.), 18:30PM)
Changed lines 22-25 from:
!!! [[Attach:project0|Project #0]]
to:
!!! [[Attach:project0|Project #0]] (Last update: 3/14(Wed.), 18:30PM)
* Try to boot xv6 operating system
* Show your student ID and name on boot message
* Try to boot xv6 operating system
* Show your student ID and name on boot message
Changed lines 16-19 from:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg. http://csl.skku.edu/images/new.gif
to:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg. http://csl.skku.edu/images/new.gif
* First lab will start on 3/14 (Wed.)
!!! [[Attach:project0|Project #0]]
* First lab will start on 3/14 (Wed.)
!!! [[Attach:project0|Project #0]]
Changed line 16 from:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg.
to:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg. http://csl.skku.edu/images/new.gif
Changed lines 15-16 from:
* TBD.
to:
* Wednesday, 7:00 PM, #400202 in Semiconductor Bldg.
Added lines 1-15:
!! SSE3044: Operating Systems (Spring 2018)
!!! [Projects]
* You will have several projects based on the xv6 instructional operating system. To successfully complete these projects, you must have excellent C programming skill and be familiar with the Linux platform.
* Required skills
** Fluent C programming (must!)
** Basic knowledge on Intel x86 architecture
** Intel x86 assembly programming
** Basic knowledge on Unix/Linux systems
** Ability to read a large, complex program
!!! [Lab. Class]
* TBD.
!!! [Projects]
* You will have several projects based on the xv6 instructional operating system. To successfully complete these projects, you must have excellent C programming skill and be familiar with the Linux platform.
* Required skills
** Fluent C programming (must!)
** Basic knowledge on Intel x86 architecture
** Intel x86 assembly programming
** Basic knowledge on Unix/Linux systems
** Ability to read a large, complex program
!!! [Lab. Class]
* TBD.